1 ps8733e 04/20/10 features ? 160 mhz maximum frequency ? low skew: 250ps ? fast rise/fall time: 1.5ns ? output enable with tri-states ? industrial temperature ? 3.3v or 5v power supply ? packaging (pb-free & green available): ?8-pin soic (w) applications ? 33 mhz for pci ? 106.25 mhz for fibre channel ? 125 mhz for ethernet ? 133 mhz for pcix ? 155.52 mhz for oc3/sonet description PI6C18551 is a low skew, low noise and high-speed clock buffer for computing, networking and communication applications. it is a non-inverting buffer with four outputs from a single input. the outputs are controlled by output enable pin (oe), outputs are tri-states when oe is low, and outputs are enabled when oe is high. logic block diagram pin description PI6C18551 3.3v/5v, 160 mhz, 4 output, cmos clock buffer y0 y1 y2 y3 clk_in oe 1 2 3 4 8 7 6 5 oe* v dd gnd y 3 clk_in y 0 y 1 y 2 *external pull-up recommended function table inputs outputs clk_in oe y[3:0] x l z l h l h h h note: 1. x = don't care; z = tri-state 10-0157
2 ps8733e 04/20/10 PI6C18551 3.3v/5v, 160 mhz, 4 output, cmos clock buffer pin description pin name type pin no descriptions clk_in input 1 input clock with pull-up resistor y0 output 2 output clock y1 output 3 output clock y2 output 4 output clock y3 output 5 output clock gnd ground 6 ground v dd power 7 3.3v or 5v power supply oe input 8 output enable with pull-up resistor. external pull-up resistor is recommended. absolute maximun ratings (over operating free-air temperature range) symbol parameters min. max. units v dd supply voltage 7 v v i input voltage -0.5 v dd +0.5 v o output voltage -0.5 v dd +0.5 ts storage temperature -65 150 c ta ambient temperature -40 85 tso soldering temperature 260 external components a minimum number of external components are required for proper operation. a decoupling capacitor of 0.01f should be connected between v dd on pin 7 and gnd on pin 6, as close to the device as possible. a 33-ohm series terminating resistor may be used on each clock output if the trace is longer than 1 inch. an external 100k-ohm pull-up resistor should be used on pin 8, oe. 10-0157
3 ps8733e 04/20/10 PI6C18551 3.3v/5v, 160 mhz, 4 output, cmos clock buffer dc electrical characteristics (v dd = 3.3v 5%, t a = -40 to 85c) symbol parameters condition min. typ. max. units v dd 3.3v i/o supply voltage 3.135 3.465 v v ih input high voltage clk_in, note 1 v dd /2 + 0.7 3.8 oe 2 v dd v il input low voltage clk_in, note 1 v dd /2 - 0.7 oe 0.8 v oh output high voltage i oh = -12ma 2.4 v ol output low voltage i ol = 12ma 0.4 i dd power supply current no load at 135 mhz 34 ma z o output impedance 20 ohm r pu internal pull-up resistor clk_in & oe 192 k- ohm i os short circuit current ?46 ma notes: 1. nominal switching threshold is v dd/2 10-0157
4 ps8733e 04/20/10 PI6C18551 3.3v/5v, 160 mhz, 4 output, cmos clock buffer ac electrical characteristics (v dd = 3.35%, t a = -40 to 85c) symbol parameters condition min. typ. max. units fin input frequency 0 160 mhz fo output frequency 3.3v, 15pf load (5) 160 fo output frequency 5v, l5pf load (5) 135 t r rise time 0.8v to 2.0v 1.5 ns t f fall time 2.0v to 0.8v 1.5 t pd propagation delay 3.3v, 135mhz (2) 2 4 8 t pd propagation delay 5v, 135mhz (2) 1.5 3 6 t sk output skew v dd /2 (3) 250 ps t jit additive jitter rms @ 12khz~20mhz 45.6 fs notes: 1. w ith rail to rail input clock. 2. all outputs with equal loading. 3. duty cycle on outputs will match incoming clock duty cycle. 4. w ith external series resistor 33? positioned close to each output pin. dc electrical characteristics (v dd = 5v 5%, t a = -40 to 85c) symbol parameters condition min. typ. max. units v dd 5v i/o supply voltage 4.75 5.25 v v ih input high voltage clk_in, note 1 v dd /2 + 1 5.5 oe 2 v dd v il input low voltage clk_in, note 1 v dd /2 - 1 oe 0.8 v ol output low voltage i ol = 12ma 0.4 v oh output high voltage (cmos level) i oh = -12ma 4 i dd power supply current no load at 135mhz 61 ma z o output impedance 20 ohm r pu internal pull-up resistor clk_in & oe 193 k-ohm i os short circuit current ?90 ma notes: 1. nominal switching threshold is v dd/2 10-0157
5 ps8733e 04/20/10 PI6C18551 3.3v/5v, 160 mhz, 4 output, cmos clock buffer jitter (rms @ 12khz~20mhz) output phase noise vs. input (light blue line) plot output rms phase jitter=156.4fs input phase noise plot input rms phase jitter=149.6fs 10-0157
6 ps8733e 04/20/10 PI6C18551 3.3v/5v, 160 mhz, 4 output, cmos clock buffer packaging mechcanical: 8-pin soic (w) ordering information (1,2,3) : ordering code package code package description PI6C18551we w pb-free & green, 8-pin soic notes: 1. thermal characteristics can be found on the company web site at www .pericom.com/packaging/ 2. e = pb-free and green 3. adding an x suffx = tape/reel pericom semiconductor corporation ? 1-800-435-2336 ? www .pericom.com 1 .0040 .0098 seating plane .013 .020 .050 bsc .016 .0075 .0098 1 8 .0099 .0196 0-8? .050 .149 .157 x.xx x.xx denotes dimensions in millimeters 3.78 3.99 .189 .196 4.80 5.00 1.27 .016 .026 1.35 1.75 .2284 .2440 5.80 6.20 0.406 0.660 0.330 0.508 0.10 0.25 0.40 1.27 0.19 0.25 0.25 0.50 x 45? .053 .068 ref description: 8-pin, 150-mil wide, soic package code: w document control no. pd - 1001 revision: f date: 03/09/05 notes: 1) controlling dimensions in millimeters. 2) ref: jedec ms-012d/aa pericom semiconductor corporation 3545 n. 1st street, san jose, ca 95134 1-800-435-2335 ? www.pericom.com 10-0157
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